Dept. of Electrical and Computer Engin., Yokohama National Univ.

Papers

Thesis

International Conf.

Domestic Conf.

(1) Y. Hashimoto, S. Yorozu, Y. Kameda, A. Fujimaki, H. Terai, and N. Yoshikawa, "Development of Passive Interconnection Technology for SFQ Circuits", IEICE TRANS. ELECTRON. vol. E88-C, 2005 pp. 198-207.

(2) Y. Kameda S.Yorozu, Y. Hashimoto, H. Terai, A. Fujimaki, N. Yoshikawa, "High-Speed Demonstration of Single-Flux-Quantum Cross-Bar Switch up to 50 GHz", IEEE Trans. Applied Superconductivity. vol. 15, 2005 pp.6-10.

(3) H. Kojima, Y. Yamashiro, K. Fujiwara, N. Yoshikawa, A. Fujimaki, H. Terai and S. Yorozu "Parameter optimization of a Josephson latching driver based on bit-error-rate simulations", Physica C, vol. 426-431, Part 2, 1 October 2005, pp. 1680-1686.

(4) A. Akimoto, Y. Yamanashi, N. Yoshikawa, A. Fujimaki, S. Yorozu and H. Terai, "Consideration of logic synthesis and clock distribution networks for SFQ logic circuits", Physica C, vol. 426-431, Part 2, 1 October 2005, pp.1687-1692.

(5) M. Tanaka, T. Kondo, T. Kawamoto, Y. Kamiya, K. Fujiwara, Y. Yamanashi, A. Akimoto, A. Fujimaki, N. Yoshikawa, H. Terai and S. Yorozu, "Design of a datapath for single-flux-quantum microprocessors with multiple ALUs", Physica C, vol.426-431, Part 2, 1 October 2005,pp .1693-1698.

(6) T. Nishigai, M. Ito, N. Yoshikawa, A. Fujimaki, H. Terai and S. Yorozu, "Design and implementation of double oscillator time-to-digital converter using SFQ logic circuits", Physica C, vol. 426-431, Part 2, 1 October 2005, pp. 1699-1703.

(7) M. Ito, K. Kawasaki, N. Yoshikawa, A. Fujimaki, H. Terai, S. Yorozu, "20 GHz operation of bit-serial handshaking systems using asynchronous SFQ logic circuits", IEEE Trans. Applied Superconductivity. vol. 15, June 2005, pp.255-258.

(8) N. Yoshikawa, T. Tomida, M. Tokuda, Q. Liu, X. Meng, S. R. Whiteley, T. Van Duzer, "Characterization of 4 K CMOS devices and circuits for hybrid Josephson-CMOS systems", IEEE Trans. Applied Superconductivity. vol. 15, June 2005, pp.267-271.

(9) T. Yamada, M. Yoshida, T. Hanai, A. Fujimaki, H. Hayakawa, Y. Kameda, S. Yorozu, H. Terai, N. Yoshikawa, "Quantitative evaluation of the single-flux-quantum cross/bar switch", IEEE Trans. Applied Superconductivity. vol. 15, June 2005, pp. 324-327.

(10) Y. Hashimoto, S. Yorozu, Y. Kameda, A. Fujimaki, H. Terai, N. Yoshikawa, "Implementation of a 4 x 4 switch with passive interconnects", IEEE Trans. Applied Superconductivity. vol. 15, June 2005, pp. 356-359.

(11) Y. Kameda, S. Yorozu, Y. Hashimoto, H. Terai, A. Fujimaki, N. Yoshikawa, "Single-flux-quantum (SFQ) circuit design and test of crossbar switch scheduler", IEEE Trans. Applied Superconductivity. vol. 15, June 2005, pp. 423-426.

(12) H. Terai, Y. Hashimoto, S. Yorozu, A. Fujimaki, N. Yoshikawa, Z. Wang, "The relationship between bit-error rate, operating speed and circuit scale of SFQ circuits", IEEE Trans. Applied Superconductivity. vol. 15, June 2005, pp. 364-367.

(13) K. Fujiwara, N. Nakajima, T. Nishigai, M. Ito, N. Yoshikawa, A. Fujimaki, H. Terai, S. Yorozu, "Error rate test of large-scale SFQ digital circuit systems", IEEE Trans. Applied Superconductivity. vol. 15, June 2005, pp. 427-430.

(14) T. Nishigai, M. Ito, N. Yoshikawa, K. Obata, K. Takagai, N. Takagai, A. Fujimaki, H. Terai, S.Yorozu, "Advanced design approaches for SFQ logic circuits based on the binary decision diagra ", IEEE Trans. Applied Superconductivity. vol. 15, June 2005, pp. 380-383.

(15) M. Tanaka, T. Kondo, N. Nakajima, T. Kawamoto, Y. Yamanasi, Y. Kamiya, A. Akimoto, A. Fujimaki, H. Hayakawa, N. Yoshikawa, H. Terai, Y. Hashimoto, S. Yorozu, "Demonstration of a single-flux-quantum microprocessor using passive transmission lines", IEEE Trans. Applied Superconductivity. vol. 15, June 2005, pp. 400-404.

(16) S. Yorozu, Y. Kameda, Y. Hashimoto, H. Terai, A. Fujimaki, N. Yoshikawa, "Progress of single flux quantum packet switch technology", IEEE Trans. Applied Superconductivity. vol. 15, June 2005, pp. 411-414.

(17) Q. Liu, T. Van Duzer, X. Meng, S.R. Whiteley, K. Fujiwara, T. Tomida, K. Tokuda, N. Yoshikawa, "Simulation and measurements on a 64-kbit hybrid Josephson-CMOS memory", IEEE Trans. Applied Superconductivity. vol. 15, June 2005, pp. 415-418.

(18) Y. Yamanashi, M. Ito, A. Tagami, N. Yoshikawa, "Observation of quantized energy levels in a Josephson junction using SFQ circuits", IEEE Trans. Applied Superconductivity. vol. 15, June 2005, pp. 864-867.

(19) Y. Hashimoto, S. Yorozu, Y. Kameda, A. Fujimaki, H. Terai, N. Yoshikawa, "Design and investigation of gate-to-gate passive interconnections for SFQ logic circuits", IEEE Trans. Applied Superconductivity. vol. 15, September 2005, pp. 3814-3820.

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