Dept. of Electrical and Computer Engin., Yokohama National Univ.

Papers

Thesis

International Conf.

Domestic Conf.

(1) H. Park, Y. Yamanashi, K. Taketomi, N. Yoshikawa, M. Tanaka, K. Obata, Y. Itou, A. Fujimaki, N. Takagi, K. Takagi, S. Nagasawa, “Design and Implementation of SFQ Half-Precision Floating-Point Adders”, IEEE Trans. Appl. Superconductivity, vol. 19, 2009, pp. 634-639.

(2) H. Hara, H. Park, Y. Yamanashi, K. Taketomi, N. Yoshikawa, K. Obata, M. Tanaka, N. Takagi, K. Takagi, A. Fujimaki, S. Nagasawa,“Design and Implementation of SFQ Half-Precision Floating-Point Multipliers” , IEEE Trans. Appl. Superconductivity, vol. 19, 2009, pp. 657-660.

(3) Y. Yamanashi, and N. Yoshikawa, “Superconductive Random Number Generator Using Thermal Noises in SFQ Circuits” , IEEE Trans. Appl. Superconductivity, vol. 19, 2009, pp. 630-633.

(4) M. Igarashi, K. Churei, N. Yoshikawa ,K. Fujiwara, Y. Hashimoto, “SFQ pulse transfer circuits using inductive coupling for current recycling ”, IEEE Trans. Appl. Superconductivity, vol. 19, 2009, pp. 649-652.

(5) I. Kataeva, H. Akaike, A. Fujimaki, N. Takagi, N. Yoshikawa, K. Inoue, H. Honda, K. Murakami, “An Operand Routing Network for an SFQ Reconfigurable Data-Paths Processor” , IEEE Trans. Appl. Superconductivity, vol. 19, 2009, pp. 665-669.

(6) T. Satoh, K. Hinode, S. Nagasawa, Y. Kitagawa, M. Hidaka, N. Yoshikawa, H. Akaike, A. Fujimaki, K. Takagi, N. Takagi, “Planarization Process for Fabricating Multi-Layer Nb Integrated Circuits Incorporating Top Active Layer”, IEEE Trans. Appl. Superconductivity, vol. 19, 2009, pp. 167-170.

(7) M. Tanaka, K. Obata, K. Takagi, N. Takagi, A. Fujimaki, N. Yoshikawa, “A high-throughput single-flux-quantum floating-point serial divider using the signed-digit representation” , IEEE Trans. Appl. Superconductivity, vol. 19, 2009, pp. 653-656.

(8) N. Takeuchi, Y. Yamanashi, Y. Saito, N. Yoshikawa, “3D simulation of superconducting microwave devices with an electromagneticfield simulator” Physica C, vol. 469, 2009, pp.1662-1665.

(9) H. Park, Y. Yamanashi, N. Yoshikawa, M. Tanaka and A. Fujimaki, “Design of fast digit-serial adders using SFQ logic circuits,” IEICE Electron. Express, vol. 6, 2009, pp.1408-1413.

(10) 吉川信行,“単一磁束量子回路を制御回路とする量子計算システム,” 応用物理, 第78巻, 第1号, 2009, pp. 22-26.

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