Dept. of Electrical and Computer Engin., Yokohama National Univ.

Papers

Thesis

International Conf.

Domestic Conf.

(1) N. Takeuchi, Y. Yamanashi, and N. Yoshikawa, "Simulation of sub-kBT bit-energy operation of adiabatic quantum-flux-parametron logic with low bit-error-rate," Appl. Phys. Lett., vol. 103, no. 6, p. 062602, 2013 (4pp).

(2) T. Mukaiyama, N. Takeuchi, K. Ehara, K. Inoue, Y. Yamanashi, and N. Yoshikawa, "Operation of an Adiabatic Quantum-Flux-Parametron Gate Using an On-Chip AC Power Source," IEEE Trans. Appl. Supercond., vol. 23, no. 4, pp. 1301605, Aug. 2013 (5pp).

(3) N. Takeuchi, Y. Yamanashi and N. Yoshikawa, "Measurement of 10 zJ energy dissipation of adiabatic quantum-flux-parametron logic using a superconducting resonator," Appl. Phys. Lett., 102, 052602 (2013).

(4) N. Takeuchi, D. Ozawa, Y. Yamanashi and N. Yoshikawa, "Adiabatic quantum flux parametron as an ultra-low-power logic device," Supercond. Sci. Tech., vol. 26, 2013, 035010 (5pp).

(5) T. Mukaiyama, N. Takeuchi, Y. Yamanashi and N. Yoshikawa, "Design and Demonstration of an On-chip AC Power Source for Adiabatic Quantum-Flux-Parametron Logic," Supercond. Sci. Tech., vol. 26, 2013, 035018 (6pp).

(6) N. Takeuchi, K. Ehara, K. Inoue, Y. Yamanashi and N. Yoshikawa, "Margin and Energy Dissipation of Adiabatic Quantum-Flux-Parametron Logic at Finite Temperature," IEEE Trans. Appl. Supercond., vol. 23, 2013, 1700304 (4pp).

(7) K. Inoue, N. Takeuchi, K. Ehara, Y. Yamanashi, and N. Yoshikawa, "Simulation and Experimental Demonstration of Logic Circuits Using an Ultra-low-power Adiabatic Quantum-flux-parametron," IEEE Trans. Appl. Supercond., vol. 23, 2013, 1301105 (5pp).

(8) K. Kuwabara, H. Jin, Y. Yamanashi and N. Yoshikawa, "Design and implementation of 64-kb CMOS static RAMs for Josephson-CMOS hybrid memories," IEEE Trans. Appl. Supercond., vol. 23, 2013, 1700704 (4pp).

(9) K. Ehara, A. Takahashi, Y. Yamanashi, N. Yoshikawa, "Development of pulse transfer circuits for serially biased SFQ circuits using the Nb 9-layer 1-μm process," IEEE Trans. Appl. Supercond., vol. 23, 2013, 1300504 (4pp).

(10) K. Aoki, Y. Yamanashi, and N. Yoshikawa, "Multiplexing Techniques of Single Flux Quantum Circuit Based Readout Circuit for a Multi-Channel Sensing System," IEEE Trans. Appl. Supercond., vol. 23, 2013, 2500204 (4pp).

(11) M. Otsubo, Y. Yamanashi, and N. Yoshikawa, "Improvement of Operating Margin of SFQ Circuits by Controlling Dependence of Signal Propagation Time on Bias Voltage," IEEE Trans. Appl. Supercond., vol. 23, 2013, 1300904 (4pp).

(12) Y. Tsuga, Y. Yamanashi, and N. Yoshikawa, "Asynchronous Digital SQUID Magnetometer With an On-Chip Magnetic Feedback for Improvement of Magnetic Resolution," IEEE Trans. Appl. Supercond., vol. 23, 2013, 1601405 (4pp).

(13) Y. Yamanashi, K. Umeda, and N. Yoshikawa, "Pseudo Sigmoid Function Generator for a Superconductive Neural Network," IEEE Trans. Appl. Supercond., vol. 23, 2013, 1701004 (4pp).

(14) M. Dorojevets, C. L. Ayala, N. Yoshikawa and A. Fujimaki, "16-Bit Wave-Pipelined Sparse-Tree RSFQ Adder," IEEE Trans. Appl. Supercond., vol. 23, 2013, 1700605 (5pp).

(15) M. Dorojevets, A. K. Kasperek, Member, N. Yoshikawa, and A. Fujimaki, "20-GHz 8 x 8-bit Parallel Carry-Save Pipelined RSFQ Multiplier," IEEE Trans. Appl. Supercond., vol. 23, 2013, 1300104 (4pp).

(16) M. Dorojevets, C. L. Ayala, N. Yoshikawa and A. Fujimaki, "8-Bit Asynchronous Sparse-Tree Superconductor RSFQ Arithmetic-Logic Unit With a Rich Set of Operations," IEEE Trans. Appl. Supercond., vol. 23, 2013, 1700104 (4pp).

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