Dept. of Electrical and Computer Engin., Yokohama National Univ.

Papers

Thesis

International Conf.

Domestic Conf.

(1) K. Sano, Y. Yamanashi, N. Yoshikawa, “Design and Demonstration of a Single-Flux-Quantum Multi-Stop Time-to-Digital Converter for Time-of-Flight Mass Spectrometry,” IEICE Trans. Electron., vol. E97-C, 2014, pp. 182-187.

(2) Y. Yamanashi, N. Yoshikawa, “Design and Evaluation of Magnetic Field Tolerant Single Flux Quantum Circuits for Superconductive Sensing Systems,” IEICE Trans. Electron., vol. E97-C, 2014, pp. 178-181.

(3) H. Kataoka, H. Honda, F. Mehdipour, N. Yoshikawa, A. Fujimaki, H. Akaike, N. Takagi, K. Murakami, “A Reconfigurable Data-Path Accelerator Based on Single Flux Quantum Circuits,” IEICE Trans. Electron., vol. E97-C, 2014, pp. 141-148.

(4) S. Nagasawa, K. Hinode, T. Satoh, M. Hidaka, H. Akaike, A. Fujimaki, N. Yoshikawa, K. Takagi, N. Takagi, “Nb 9-layer fabrication process for superconducting large-scale SFQ circuits and its process evaluation,” IEICE Trans. Electron., vol. E97-C, 2014, pp. 132-140. DOI: 10.1587/transele.E97.C.132

(5) X. Peng, Y. Yamanashi, N. Yoshikawa, A. Fujimaki, N. Takagi, K. Takagi, M. Hidaka, “Design and High-Speed Demonstration of Single-Flux-Quantum Bit-Serial Floating-Point Multipliers Using a 10kA/cm2 Nb Process,” IEICE Trans. Electron., vol. E97-C, 2014, pp. 188-193.

(6) A. Fujimaki, M. Tanaka, R. Kasagi, K. Takagi, M. Okada, Y. Hayakawa, K. Takata, H. Akaike, N. Yoshikawa, S. Nagasawa, K. Takagi, N. Takagi, “Large-Scale Integrated Circuit Design Based on a Nb Nine-Layer Structure for Reconfigurable Data-Path Processors,” IEICE Trans. Electron., vol. E97-C, 2014, pp. 157-165. DOI: 10.1587/transele.E97.C.157

(7) K. Sano, Y. Muramatsu, Y. Yamanashi, N. Yoshikawa, N. Zen, M. Ohkubo, “Reduction of the Jitter of Single-Flux-Quantum Time-to-Digital Converters for Time-of-Flight Mass Spectrometry,” Physica C, vol. 504, 2014, pp. 97-101.

(8) N. Takeuchi, T. Ortlepp, Y. Yamanashi, N. Yoshikawa, “Novel latch for adiabatic quantum-flux-parametron logic,” Journal of Appl. Physics, vol. 115, 2014, 103910 (4pp).

(9) D. Si, K. Inoue, Y. Yamanashi, N. Yoshikawa, “Yield analysis of large-scale adiabatic-quantum-flux-parametron logic: The effect of the distribution of the critical current,” Physica C, vol. 504, 2014, pp. 102-105.

(10) N. Takeuchi, T. Ortlepp, Y. Yamanashi, N. Yoshikawa, “(Invited) High-speed Experimental Demonstration of Adiabatic Quantum-Flux-Latches,” IEEE Trans. Appl. Supercond., vol. 24, 2014,1300204 (4pp).

(11) N. Takeuchi, Y. Yamanashi, N. Yoshikawa, “Reversible logic gate using adiabatic superconducting devices,” Scientific Reports, vol. 4, 2014, 6354.

(12) N. Takeuchi, Y. Yamanashi, N. Yoshikawa, “Reversible Computing Using Adiabatic Superconductor Logic,” Lecture Notes in Computer Science, Vol. 8507, 2014, pp 15-25.

Copyright (C) 2018 Yokohama National Univ. All Rights Reserved