Papers of 2015
(1) N. Takeuchi, Y. Yamanashi, N. Yoshikawa, “Energy efficiency of adiabatic superconductor logic,” Supercond. Sci. Technol., vol. 28, 2015, 015003 (5pp).DOI: 10.1088/0953-2048/28/1/015003
(2) K. Inoue, N. Takeuchi, T. Narama, Y. Yamanashi, N. Yoshikawa, “Design and demonstration of adiabatic quantum-flux-parametron logic circuits with superconductor magnetic shields,” Supercond. Sci. Technol., vol. 28, 2015, 045020 (7pp). DOI: 10.1088/0953-2048/28/4/045020
(3) Y. Sakashita, Y. Yamanashi, N. Yoshikawa, “50 GHz Demonstration of an Integer-Type Butterfly Processing Circuit for an FFT Processor Using the 10 kA/cm2 Nb Process,” IEICE Trans. Electron., vol. E98-C, March, 2015, pp. 232-237. DOI: 10.1587/transele.E98.C.232
(4) Q. Xu, X. Peng, T. Ortlepp, Y. Yamanashi, N. Yoshikawa, “Demonstration of Bit-Serial SFQ-Based Computing for Integer Iteration Algorithms,” IEEE Trans. on Appl. Supercond., 25, 2015, 1300704. DOI: 10.1109/TASC.2014.2374454
(5) Y. Sakashita, Y. Yamanashi, N. Yoshikawa, “High-Speed Operation of an SFQ Butterfly Processing Circuit for FFT Processors Using the 10 kA/cm2 Nb Process,” IEEE Trans. on Appl. Supercond., 25, 2015, 1301205. DOI: 10.1109/TASC.2014.2384833
(6) X. Peng, Q. Xu, T. Kato, Y. Yamanashi, N. Yoshikawa, A. Fujimaki, N. Takagi, K. Takagi and M. Hidaka, “High-Speed Demonstration of Bit-Serial Floating-Point Adders and Multipliers Using Single-Flux-Quantum Circuits,” IEEE Trans. on Appl. Supercond., 25, 2015, 1301106. DOI: 10.1109/TASC.2014.2382973
(7) N. Takeuchi, Y. Yamanashi, N. Yoshikawa, “Adiabatic quantum-flux-parametron cell library adopting minimalist design,” Journal of Applied Physics, 117, 2015, 173912; DOI: 10.1063/1.4919838
(8) K. Sano, Y. Takahashi, Y. Yamanashi, N. Yoshikawa, N. Zen, M. Ohkubo, “Demonstration of single-flux-quantum readout circuits for time-of-flight mass spectrometry systems using superconducting strip ion detectors,” Supercond. Sci. Technol., vol.28, 2015, 074003 (5pp) DOI :10.1088/0953-2048/28/7/074003
(9) C. J. Fourie, X. Peng, R. Numaguchi, N. Yoshikawa, “Inductance and Coupling of Stacked Vias in a Multilayer Superconductive IC Process,” IEEE Trans. Appl. Supercond., vol. 25, 2015, 1101104,. DOI : 10.1109/TASC.2014.2378013
(10) C. J. Fourie, A. Takahashi, N. Yoshikawa, “Fast and accurate inductance and coupling calculation for a multi-layer Nb process,” Supercond. Sci. Technol., vol. 28, 2015, 035013,. DOI : 10.1088/0953-2048/28/3/035013
(11) N. Takeuchi, Y. Yamanashi, N. Yoshikawa, “Thermodynamic Study of Energy Dissipation in Adiabatic Superconductor Logic,” Phys. Rev. Applied 4, 2015, 034007; DOI: 10.1103/PhysRevApplied.4.034007
(12) S. Nishimoto, Y. Yamanashi, N. Yoshikawa, “Design Method of Single-Flux-Quantum Logic Circuits Using Dynamically Reconfigurable Logic Gates,” IEEE Trans. Appl. Supercond., vol. 25, 2015, 1301405,. DOI : 10.1109/TASC.2014.2387251
(13) K. Sato, Y. Yamanashi, N. Yoshikawa, “High-Speed Operation of a Single Flux Quantum Multiple Input Merger Using a Magnetically Coupled SQUID Stack,” IEEE Trans. Appl. Supercond., vol. 25, 2015, 1301605,. DOI : 10.1109/TASC.2015.2398675
(14) N. Takeuchi, T. Ortlepp, Y. Yamanashi, N. Yoshikawa, “Experimental Demonstration of Quantum-Flux-Latch-Based Circuits,” IEEE Trans. Appl. Supercond., vol. 25, 2015, 1300803,. DOI : 10.1109/TASC.2014.2374472
(15) N. Tsuji, N. Takeuchi, T. Narama, T. Ortlepp, Y. Yamanashi, N. Yoshikawa, “Magnetically coupled quantum-flux-latch with wide operation margins,” Supercond. Sci. Technol., 28, 2015, 115013,. DOI : 10.1088/0953-2048/28/11/115013
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