Papers of 2016
(1) C. Fourie, N. Takeuchi, N. Yoshikawa, "(Invited) Inductance and Current Distribution Extraction in Nb Multilayer Circuits with Superconductive and Resistive Components", IEICE Transactions on Electronics vol. E99-C, No. 6 June 2016, pp. 683-691,. DOI : 10.1587/transele.E99.C.683
(2) N. Tsuji, N. Takeuchi, Y. Yamanashi, T. Ortlepp, N. Yoshikawa, "Majority Gate-Based Feedback Latches for Adiabatic Quantum Flux Parametron Logic", IEICE Transactions on Electronics vol. E99-C, No. 6 June 2016, pp. 710-716,. DOI : 10.1587/transele.E99.C.710
(3) Y. Yamanashi, S. Nishimoto, and N. Yoshikawa, “30 GHz Operation of Single-Flux-Quantum Arithmetic Logic Unit Implemented by Using Dynamically Reconfigurable Gates”, IEICE Transactions on Electronics vol. E99-C, No. 6 June 2016, pp. 692-696,. DOI : 10.1587/transele.E99.C.692
(4) F. China, T. Narama, N. Takeuchi, T. Ortlepp, Y. Yamanashi, N. Yoshikawa, "Design and Demonstration of Interface Circuits between Rapid Single-Flux-Quantum and Adiabatic Quantum-Flux-Parametron Circuits", IEEE Trans. Appl. Supercond., vol. 26, No. 5, Aug. 2016, 1301305-1-5, DOI : 10.1109/TASC.2016.2577603
(5) R. Kihara, Y. Yamanashi, N. Yoshikawa, "Power Reduction of Josephson Random Access Memory Using Stochastic Resonance", IEEE Trans. Appl. Appl. Supercond., Vol. 26, No. 8, Dec. 2016, 1301704-1-4, DOI: 10.1109/TASC.2016.2607156
(6) R. Tsutsumi, K. Sato, Y. Yamanashi, N. Yoshikawa, "Improvement of Operation Speed of LR-Biased Low-Power Single-Flux Quantum Circuits by Introduction of Dynamic Resetting of Bias Currents", IEEE Trans. Appl. Appl. Supercond., Vol. 26, No. 8, Dec. 2016, 1301405-1-5, DOI: 10.1109/TASC.2016.2598766
(7) Q. Xu, C. L. Ayala, Y. Yamanashi, N. Takeuchi, N. Yoshikawa, "HDL-Based Modeling Approach for Digital Simulation of Adiabatic Quantum Flux Parametron Logic", IEEE Trans. Appl. Appl. Supercond., Vol. 26, No. 8, Dec. 2016, 1301805-1-5, DOI: 10.1109/TASC.2016.2615123
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