International Conf. of 2011
(1) N. Yoshikawa, “Overview of the hybrid memory project at YNU,” Superconducting electronics meeting at Berkeley, University of California at Berkeley, May 18-20, 2011.
(2) K. Kuwabara amd N. Yoshikawa, “Design of 8-T SRAM cells and improvement of Josephson latching drivers,” Superconducting electronics meeting at Berkeley, University of California at Berkeley, May 18-20, 2011.
(3) J. Hyun-Joo and N. Yoshikawa, “Development of CMOS amplifiers for Josephson-CMOS interface,” Superconducting electronics meeting at Berkeley, University of California at Berkeley, May 18-20, 2011.
(4) N. Yoshikawa, “Ultra-low-power computing using adiabatic QFP,” Superconducting electronics meeting at Berkeley, University of California at Berkeley, May 18-20, 2011.
(5) M. Okada, I. Kataeva, M. Tanaka, H. Akaike, A. Fujimaki, N. Yoshikawa, S. Nagasawa, N. Takagi, “(Invited)45 GHz operation of Single-Flux-Quantum Reconfigurable Data-Path Processor with 11000 Josephson Junctions,” International Superconductivity Electronics Conference (ISEC2011), Hague, Netherlands, September 19, 2011, 1-EB-I2.
(6) Masamitsu Tanaka, Shota Takeshima, Kazuyoshi Takagi, Hiroyuki Akaike, Akira Fujimaki, Nobuyuki Yoshikawa, Shuichi Nagasawa, Naofumi Takagi, “Multi-Layered Single-Flux-Quantum Circuits Designed Using Timing-Driven Automatic Routing,” International Superconductivity Electronics Conference (ISEC2011), Hague, Netherlands, September 19, 2011, 1-EB-O7.
(7) Y. Shimamura, Y. Yamanashi, N. Yoshikawa, A. Fujimaki, N. Takagi, K. Takagi, “Design and implementation of SFQ Floating-Point Multiplier and Adder Using 10 kA/cm2 Nb Process,” International Superconductivity Electronics Conference (ISEC2011), Hague, Netherlands, September 19, 2011, 1-EB-O8.
(8) Tomoya Imaizumi, Yuki Yamanashi, Nobuyuki Yoshikawa, Thomas Ortlepp, ” Single Flux Quantum Comparator: A study of Gray Zone Width and Operation Frequency in dependence on circuit parameters,” International Superconductivity Electronics Conference (ISEC2011), Hague, Netherlands, September 19, 2011, 1-EA-P12.
(9) Y. Shimamura, N. Yoshikawa, T. Ortlepp, “Analysis of computational energy efficiency in single flux quantum electronics by implementing an integer-based hardware-algorithm,” International Superconductivity Electronics Conference (ISEC2011), Hague, Netherlands, September 19, 2011, 1-EA-P15.
(10) K. Suzuki, M. Ukibe, S. Shiki, S. Miki, Z. Wang, Y. Takahashi, N. Yoshikawa, M. Ohkubo, “Pulse height distribution analysis for superconducting nanostripline ion detector with fast pulse-integration analog-to-digital converter,” International Superconductivity Electronics Conference (ISEC2011), Hague, Netherlands, September 19, 2011, 1-EA-P49.
(11) Y. Takahashi, Y. Yamanashi, N. Yoshikawa, S. Miki, Z. Wang, K.Suzuki, M. Ukibe, M. Ohkubo, “Design and Implementation of SFQ Multi-Stop Time-to-Digital Converters for Time-of-Flight Mass Spectrometry,” International Superconductivity Electronics Conference (ISEC2011), Hague, Netherlands, September 19, 2011, 1-EA-P50.
(12) N. Yoshikawa, F. Miyaoka, K. Hinago, Y. Shimamura, Y. Yamanashi, “100-GHz high-speed demonstration of circuit components of FFT processors using 10 kA/cm2 Nb process,” International Superconductivity Electronics Conference (ISEC2011), Hague, Netherlands, September 20, 2011, 2-EA-O15.
(13) N. Yoshikawa, D. Ozawa, Y. Yamanashi, “Circuit demonstration of ultra-low-power adiabatic quantum flux parametrons,” International Superconductivity Electronics Conference (ISEC2011), Hague, Netherlands, September 20, 2011, 2-EB-O5.
(14) Yuki Yamanashi, Tatsuro Sugiura, Nobuyuki Yoshikawa, “Novel Superconductive Physical Random Number Generator Using Timing Jitter in Single Flux Quantum Circuit,” International Superconductivity Electronics Conference (ISEC2011), Hague, Netherlands, September 20, 2011, 2-EA-P13.
(15) K. Ehara, Y. Yamanashi, N. Yoshikawa, “Investigation of bias-current-supply methods for serially biased SFQ circuits,” International Superconductivity Electronics Conference (ISEC2011), Hague, Netherlands, September 20, 2011, 2-EA-P15.
(16) H. Jin, K. Yaguchi, Y. Yamanashi, N. Yoshikawa, “Investigation of Robust CMOS Amplifiers for Josephson-CMOS Hybrid Memories,” International Superconductivity Electronics Conference (ISEC2011), Hague, Netherlands, September 20, 2011, 2-EA-P17.
(17) S. Miura, N. Takeuchi, Y. Yamanashi, N. Yoshikawa, “Implementation of SFQ Microwave Choppers for Controlling Quantum Bits,” International Superconductivity Electronics Conference (ISEC2011), Hague, Netherlands, September 20, 2011, 2-EA-P26.
(18) Irina Kataeva, Hiroyuki Akaike, Akira Fujimaki, Nobuyuki Yoshikawa, Naofumi Takagi, “Experimental Demonstration of an Operand Routing Network Prototype Employing Clock Control and Data Synchronization Scheme,” International Superconductivity Electronics Conference (ISEC2011), Hague, Netherlands, September 22, 2011, 4-EA-P14.
(19) H. Jin, K. Yaguchi, Y. Yamanashi, N. Yoshikawa, T. V. Duzer, “Access Time Measurement of Josephson-CMOS Hybrid Memory Systems with an SFQ Bit-Serial Data-Input Port,” International Superconductivity Electronics Conference (ISEC2011), Hague, Netherlands, September 22, 2011, 4-EA-P16.
(20) N. Yoshikawa, “(Invited)Margin and Energy Consumption of Adiabatic QFP Logic,” 7th FLUXONICS RSFQ design workshop 2011, Ilmenau, Germany, September 26, 2011.
(21) Y. Shimamura, N. Yoshikawa, Y. Yamanashi, “SFQ Logic Cells Directly Connectable to Passive Transmission Lines,” 7th FLUXONICS RSFQ design workshop 2011, Ilmenau, Germany, September 27, 2011.
(22) K. Ehara, N. Yoshikawa, Y. Yamanashi, “Current Recycling Technique for SFQ Circuits,” 7th FLUXONICS RSFQ design workshop 2011, Ilmenau, Germany, September 27, 2011.
(23) H. Jin, N. Yoshikawa, Y. Yamanashi, “High-Speed CMOS Amplifiers for Josephson-CMOS Interfaces,” 7th FLUXONICS RSFQ design workshop 2011, Ilmenau, Germany, September 27, 2011.
(24) N. Yoshikawa, D. Ozawa, Y. Yamanashi, “Ultra-Low-Power Superconducting Logic Devices using Adiabatic Quantum Flux Parametron,” Extended Abstracts of the 2011 International Conference on Solid State Devices and Materials (SSDM 2011), Nagoya, September 30, 2011, J-8-3.
(25) N. Yoshikawa, K. Ehara, K. Inoue, Y. Yamanashi, “Investigaation of Rpbustness of Logic Gates using Ultra-Low-Power adiavatic Quantum Flux Parametron,” Abstracts on 24nd International Symposium on Superconductivity (ISS2011), Tokyo, October26 , 2011, FD-15.
(26) Naoki Takeuchi, Yuki Yamanashi, Nobuyuki Yoshikawa, “Comparison of 3D-electromagnetic simulation methods for designing superconductor microwave devices,” The 6th East Asia Symposium on Superconductor Electronics (EASSE 2011), Yamagata University, Yonezawa, October 27, 2011, 27-P-20.
(27) Nobuyuki Yoshikawa, Kohei Ehara, Kenta Inoue, Naoki Takeuchi, Yuki Yamanashi, “Development of Ultra-Low-Power Processors Using Adiabatic Quantum-Flux-Parametron Logic,” Proceedings of Superconducting SFQ VLSI Workshop (SSV 2011), Kyoto Research Park, Kyoto, November 1, 2011, O-1.
(28) Nobuyuki Yoshikawa, “(Invited) Energy-efficient logic circuits using adiabatic quantum flux parametron,” The 6th East Asia Symposium on Superconductor Electronics (EASSE 2011), Yamagata University, Yonezawa, October 28, 2011, 28-DH-2
(29) Yuto Tsuga, Yuki Yamanashi, Nobuyuki Yoshikawa, “Development of an asynchronous digital SQUID magnetometer,” The 6th East Asia Symposium on Superconductor Electronics (EASSE 2011), Yamagata University, Yonezawa, October 27, 2011, 27-P-07
(30) Kazuki Aoki, Yuki Yamanashi, Nobuyuki Yoshikawa, “Time division multiplexing for a multi-channel asynchronous digital SQUID system,” The 6th East Asia Symposium on Superconductor Electronics (EASSE 2011), Yamagata University, Yonezawa, October 27, 2011, 27-P-08.
(31) Shogo Miura, Yuki Yamanashi, Nobuyuki Yoshikawa, “High-speed escape-rate measurements of Josephson junctions using SFQ circuits,” The 6th East Asia Symposium on Superconductor Electronics (EASSE 2011), Yamagata University, Yonezawa, October 27, 2011, 27-P-11.
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