International Conf. of 2018
(1) "N. Takeuchi, C. Ayala, Q. Xu, H. Suzuki, Y. Yamanashi, T. Ortlepp, N. Yoshikawa, “Recent Development and Applications of Adiabatic Quantum Flux Parametron Logic, ” The 11th Superconducting SFQ VLSI Workshop (SSV 2018) / 6th CRAVITY Symposium, Tsukuba, Japan, Feb. 7-8, 2018. O-6."
(2) "C. Ayala, N. Takeuchi, Q. Xu, Y. Yamanashi, T. Ortlepp, N. Yoshikawa, “Adiabatic Quantum-Flux-Parametron-Based Microprocessor: Architecture, Logic Design, Modeling, and Design Tools, ” The 11th Superconducting SFQ VLSI Workshop (SSV 2018) / 6th CRAVITY Symposium, Tsukuba, Japan, Feb. 7-8, 2018. O-7."
(3) "F. Ke, Y. Yamanashi, T. Ortlepp, N. Yoshikawa, “Design and Simulation of a 7-bit 18-sample/cycle SFQ-Based Sine Wave Generator, ” The 11th Superconducting SFQ VLSI Workshop (SSV 2018) / 6th CRAVITY Symposium, Tsukuba, Japan, Feb. 7-8, 2018. P-2."
(4) "K. Akizuki, R. Sato, Y. Yamanashi, N. Yoshikawa, “Design of an SFQ Complex Event Detector Circuit Corresponding to Regular Expressions, ” The 11th Superconducting SFQ VLSI Workshop (SSV 2018) / 6th CRAVITY Symposium, Tsukuba, Japan, Feb. 7-8, 2018. P-5."
(5) "M. Araki, Y. Yamanashi, N. Yoshikawa, “Design and Evaluation of a 4-Input Logic Block for Realization of FPGAs Using Single Flux Quantum Circuits, ” The 11th Superconducting SFQ VLSI Workshop (SSV 2018) / 6th CRAVITY Symposium, Tsukuba, Japan, Feb. 7-8, 2018. P-7."
(6) "T. Tamura, C. Ayala, N. Takeuchi, Y. Yamanashi, N. Yoshikawa, “Reduction of the Circuit Area of an 8-word by 1-bit Register Using Quantum Flux Parametron Latch, ” The 11th Superconducting SFQ VLSI Workshop (SSV 2018) / 6th CRAVITY Symposium, Tsukuba, Japan, Feb. 7-8, 2018. P-8."
(7) "T. Yamae, N. Takeuchi, Y. Yamanashi, N. Yoshikawa, “Design and Simulation of Reversible Adders Using Adiabatic Quantum Flux Parametron Logic, ” The 11th Superconducting SFQ VLSI Workshop (SSV 2018) / 6th CRAVITY Symposium, Tsukuba, Japan, Feb. 7-8, 2018. P-9."
(8) "Y. Hironaka, C. Ayala, Y. Yamanashi, N. Yoshikawa, “Design of a 1-bit SFQ CPU and Comparison with CMOS and AQFP Circuits, ” The 11th Superconducting SFQ VLSI Workshop (SSV 2018) / 6th CRAVITY Symposium, Tsukuba, Japan, Feb. 7-8, 2018. P-10."
(9) "N. Yoshikawa, “AQFP circuit simulation, ” 1st South African Workshop on Superconducting Circuit Design Tools and Modelling 2018, Cape town, South Africa, Feb. 18-23, 2018."
(10) "N. Yoshikawa, “PTL + drivers/receivers, reflection, ” 1st South African Workshop on Superconducting Circuit Design Tools and Modelling 2018, Cape town, South Africa, Feb. 18-23, 2018."
(11) "N. Yoshikawa, “Simulation vs measurement at high frequency, ” 1st South African Workshop on Superconducting Circuit Design Tools and Modelling 2018, Cape town, South Africa, Feb. 18-23, 2018."
(12) "N. Yoshikawa, “(Invited) Recent Development of Extremely Energy-Efficient Integrated Circuits Using Adiabatic Flux Parametron,” The 14th International Workshop of High-Temperature Superconductors in High Frequency Field (HTSHFF2018), Zao, Yamagata, Japan, June 5-8, 2018."
(13) "C. Ayala, Q. Xu, R. Saito, T. Tanaka, N. Takeuchi, Y. Yamanashi, N. Yoshikawa, “Execution units for a RISC-based adiabatic quantum-flux-parametron microprocessor datapath, ” Applied Superconductivity Conference (ASC2018), Seattle, USA, Oct. 28-Nov. 2, 2018, 1EOr1C-05."
(14) "A. Sanada, Y. Yamanashi, N. Yoshikawa, “Study on Single Flux Quantum Floating-Point Divider Based on Goldschmidt’s Algorithm, ” Applied Superconductivity Conference 2018 (ASC2018), Seattle, USA, Oct. 28- Nov. 2, 2018, 1EPo2E-05."
(15) "F. China, N. Takeuchi, T. Ortlepp, Y. Yamanashi, N. Yoshikawa, “A High-Speed Voltage Driver using a 4JL Gate for Adiabatic Quantum Flux Parametron, ” Applied Superconductivity Conference (ASC2018), Seattle, USA, Oct. 28-Nov. 2, 2018, 1EPo2E-06."
(16) "Y. Tomitsuka, Y. Abe, N. Zen, Y. Yamanashi, N. Yoshikawa, “Demonstration of picosecond time resolution of double-oscillator time-to-digital converters using single-flux-quantum circuits, ” Applied Superconductivity Conference (ASC2018), Seattle, USA, Oct. 28-Nov. 2, 2018, 1EPo2E-07."
(17) "N. Takeuchi, T. Yamashita, S. Miyajima, S. Miki, N. Yoshikawa, H. Terai, “Demonstration of a superconducting nanowire single-photon detector using adiabatic quantum-flux-parametron logic in a 0.1 W Gifford–McMahon cryocooler, ” Applied Superconductivity Conference (ASC2018), Seattle, USA, Oct. 28-Nov. 2, 2018, 2EPo1B-06."
(18) "Y. Okuma, Y. Yamanashi, N. Yoshikawa, “Design and Implementation of a Low-Power Area-Efficient Adiabatic-Quantum-Flux-Parametron FPGA using Josephson-CMOS Hybrid Memories, ” Applied Superconductivity Conference (ASC2018), Seattle, USA, Oct. 28-Nov. 2, 2018, 2EOr1B-03."
(19) "Y. Yamanashi, S. Nakaishi, N. Yoshikawa, “[Invited] Evaluation of Single Flux Quantum Flip-Flops Containing π-Shifted Josephson Junctions, ” Applied Superconductivity Conference (ASC2018), Seattle, USA, Oct. 28-Nov. 2, 2018, 2EPo2E-02."
(20) "K. Arai, N. Takeuchi, Y. Yamanashi, N. Yoshikawa, “Inverting quantum flux parametron as adiabatic superconductor logic without transformers, ” Applied Superconductivity Conference (ASC2018), Seattle, USA, Oct. 28-Nov. 2, 2018, 2EPo2E-09."
(21) "N. Takeuchi, C. Ayala, Q. Xu, N. Yoshikawa, “A feedback-friendly large-scale clocking scheme for adiabatic quantum-fluxparametronlogic datapaths, ” Applied Superconductivity Conference (ASC2018), Seattle, USA, Oct. 28-Nov. 2, 2018, 3EPo2D-08."
(22) "Y. He, N. Takeuchi, Q. Xu, N. Yoshikawa, “Superconducting microwave delay network for adiabatic quantum-flux-parametron logic, ” Applied Superconductivity Conference (ASC2018), Seattle, USA, Oct. 28-Nov. 2, 2018, 3EPo2D-09."
(23) "M. Nozoe, C. Ayala, N. Takeuchi, Y. Yamanashi, N. Yoshikawa, “Design and implementation of 16-word by 4-bit register file using adiabatic quantum flux parametron logic, ” Applied Superconductivity Conference (ASC2018), Seattle, USA, Oct. 28-Nov. 2, 2018, 3EOr2C-02."
(24) "Q. Xu, T. Tanaka, C. Ayala, N. Takeuchi, N. Yoshikawa, “Design of Adiabatic-Quantum-Flux-Parametron Register Files Using a Top-Down Design Flow, ” Applied Superconductivity Conference (ASC2018), Seattle, USA, Oct. 28-Nov. 2, 2018, 4EPo1D-04."
(25) "C. Fourie, M. Botha, P. Febvre, C. Ayala, Q. Xu, N. Yoshikawa, E. Patrick, M. Law, Y. Wang, M. Annavaram,P. Beerel, S. Gupta, S. Nazarian, M. Pedram, “[Invited] ColdFlux Superconducting EDA and TCAD Tools Project: Overview and Progress, ” Applied Superconductivity Conference (ASC2018), Seattle, USA, Oct. 28-Nov. 2, 2018, 4EOr2B-02"
(26) "T. Tanaka, C. Ayala, Q. Xu, R. Saito, N. Yoshikawa, “Fabrication of Adiabatic Quantum-Flux-Parametron Integrated Circuits Using an Automatic Placement Tool Based on Genetic Algorithms, ” Applied Superconductivity Conference (ASC2018), Seattle, USA, Oct. 28-Nov. 2, 2018, 4EOr2B-05."
(27) "T. Yamae, N. Takeuchi, Y. Yamanashi, N. Yoshikawa, “Design and demonstration of reversible full adders using adiabatic quantum flux parametron logic, ” Applied Superconductivity Conference (ASC2018), Seattle, USA, Oct. 28-Nov. 2, 2018, 4EOr3C-01."
(28) "F. Ke, Y. Yamanashi, N. Yoshikawa, “Design and demonstration of an SFQ-based full-component singlechip FFT processor, ” Applied Superconductivity Conference (ASC2018), Seattle, USA, Oct. 28-Nov. 2, 2018, 4EOr3C-03."
(29) "Q. Xu, Y. Wang, X. Ma, N. Takeuchi, N. Yoshikawa, “Design and implementation of an extremely energy-efficient deep learning accelerator using superconducting logic, ” Applied Superconductivity Conference (ASC2018), Seattle, USA, Oct. 28-Nov. 2, 2018, 4EOr3C-04."
(30) "D. Scott Holmes, E. DeBenedictis, R. Fagaly, P. Febvre, D. Gupta, Anna. Herr, Anna Leese de Escobar, N. Missert, O. Mukhanov, Satyavolu Papa Rao, N. Yoshikawa, P. Gargini, “[Invited] Superconductor Electronics Technology Roadmap for IRDS 2018, ” Applied Superconductivity Conference (ASC2018), Seattle, USA, Oct. 28-Nov. 2, 2018, 5EOr1A-01."
(31) "N. Yoshikawa, “[Invited] High-speed and Low-power signal processing using superconducting circuits,” Workshop on the future of silicon detector technologies FuTuRe II, Erfurt, Germany, December 2-4, 2018."
(32) "C. Ayala, Olivia Chen, R. Saito, T. Tanaka, N. Takeuchi, Y. Yamanashi, N. Yoshikawa, “[Invited] Development of an extremely energy-efficient AQFP microprocessor, ” The 31st International Symposium on Superconductivity (ISS2018), Ibaraki, Japan, Dec. 12-14, 2018, ED5-2-INV."
(33) "T. Tamura, N. Takeuchi, C. Ayala, Y. Yamanashi, N. Yoshikawa, “Area Reduction of Adiabatic-Quantum-Flux-Parametron Register-Files by Using Asymmetric Gates, ” The 31st International Symposium on Superconductivity (ISS2018), Ibaraki, Japan, Dec. 12-14, 2018, EDP-2-1."
(34) "Y. Hironaka, Y. Yamanashi, N. Yoshikawa, “Design and evaluation of a one-instruction-set single-flux-quantum microprocessor for the demonstration of Josephson-CMOS hybrid system, ” The 31st International Symposium on Superconductivity (ISS2018), Ibaraki, Japan, Dec. 12-14, 2018, EDP-2-2."
(35) "F. Ke, Y. Yamanashi, T. Ortlepp, N. Yoshikawa, “Design and demonstration of an 8-bit 18-sample/cycle sine code generator using single-flux-quantum circuits, ” The 31st International Symposium on Superconductivity (ISS2018), Ibaraki, Japan, Dec. 12-14, 2018, EDP-2-3."
(36) "M. Araki, Y. Yamanashi, N. Yoshikawa, “Design and measurement of 4-unit 2-bit FPGA using single-flux-quantum circuits, ” The 31st International Symposium on Superconductivity (ISS2018), Ibaraki, Japan, Dec. 12-14, 2018, EDP-2-4."
(37) "M. Nozoe, N. Takeuchi, Y. Yamanashi, N. Yoshikawa, “Demonstration of 5.6 ps Latency of Adiabatic Quantum Flux Parametron using Delayed Clocking Scheme, ” The 31st International Symposium on Superconductivity (ISS2018), Ibaraki, Japan, Dec. 12-14, 2018, EDP-2-4."
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