International Conf. of 2006
(1) Y. Hashimoto, S. Yorozu, Y. Kameda, H. Suzuki, T. Miyazaki, H. Kojima, N. Yoshikawa, “Implementation and experimental evaluation of a cryocooled system prototype for high-throughput SFQ digital applications” Abstract of 2006 Applied Superconductivity Conference (ASC2006), Seattle, Washington, September 2006, 4EX01
(2) M. Tanaka, Y. Kamiya, N. Irie, A. Fujimaki, Y. Yamanashi, A. Akimoto, H. Park, N. Yoshikawa, H. Terai, S. Yorozu. “ A new design approach for high-throughput arithmetic circuits for single-flux-quantum” , Abstract of 2006 Applied Superconductivity Conference (ASC2006), Seattle, Washington, September 2006, 4EB06.
(3) H. Terai, Z. Wang, M .Tanaka, A Fujimaki, Y. Yamanashi, N. Yoshikawa, Y . Hashimoto, “Diagnostic Test of Large-Scale SFQ Shift Register” , Abstract of 2006 Applied Superconductivity Conference (ASC2006), Seattle, Washington, September 2006, 2EI05.
(4) Q. Liu, K. Fujiwara, X. Meng, T. Van Duzer, N. Yoshikawa, Y. Thakahashi, T. Hikida, N. Kawai, “Latency and Power Measurements on a 64-kb Hybrid Josephson-CMOS Memory” , Abstract of 2006 Applied Superconductivity Conference (ASC2006), Seattle, Washington, September 2006, 4EB08.
(5) Y. Yamanashi, T. Nishigai, N. Yoshikawa, “Study of LR-Loading Technique for Low-Power Single Flux Quantum Circuits” , Abstract of 2006 Applied Superconductivity Conference (ASC2006), Seattle, Washington, September 2006, 1EX07
(6) Y. Yamanashi, A. Akimoto, H. Park, N. Yoshikawa, M. Tanaka, Y. Kamiya, N. Irie, A. Fujimaki, H Terai, S. Yorozu, “Design and Implementation of a Pipelined Bit-Serial SFQ Microprocessor, CORE1b” Abstract of 2006 Applied Superconductivity Conference (ASC2006), Seattle, Washington, September 2006, 3EY01
(7) H. Park, Y. Yamanashi, N .Yoshikawa, A. Fujimaki, M. Tanaka, H. Terai, S. Yorozu, “Design of Bit-Slice Adders Using RSFQ Logic Circuits” , Abstract of 2006 Applied Superconductivity Conference (ASC2006), Seattle, Washington, September 2006, 3EY03.
(8) G. Matsuda, Y. Yamanashi, N. Yoshikawa, “Design of an SFQ Microwave Chopper for Controlling Quantum Bits” , Abstract of 2006 Applied Superconductivity Conference (ASC2006), Seattle, Washington, September 2006, 1EX05.
(9) T. Hikida, K. Fujiwara, N. Yoshikawa, A. Fujimaki, H. Terai, NICT; S. Yorozu, “Bit-Error-Rate Measurements of RSFQ Shift Register Memories” , Abstract of 2006 Applied Superconductivity Conference (ASC2006), Seattle, Washington, September 2006, 4EB05.
(10) Y. Takahashi, M. Tokuda, N. Kawai, N. Yoshikawa, K. Fujiwara, Q. Liu, T. Van Duzer, “Access-Time Measurements of a Josephson-CMOS Hybrid Memory using an RSFQ Time-to-Digital Converter” , Abstract of 2006 Applied Superconductivity Conference (ASC2006), Seattle, Washington, September 2006, 2EI03.
(11) Y. Nobumori, T. Nishigai, K. Nakamiya, N. Yoshikawa, A. Fujimaki, H. Terai, NICT; S. Yorozu, “Design and Implementation of a Fully Asynchronous RSFQ Microprocessor: SCRAM2” Abstract of 2006 Applied Superconductivity Conference (ASC2006), Seattle, Washington, September 2006, 3EY02.
(12) A. Fujimaki, M. Tanaka, N. Irie, S. Iwasaki, T. Yamada, N. Takagi, H. Park, Y. Yamanashi, N. Yoshikawa, H. Terai, S. Yorozu, Y. Takai, “Development of High-speed Single-flux-quantum Microprocessors,” Abstracts on 19th International Symposium on Superconductivity (ISS2006), Nagoya, October 2006, pp. 160
(13) S. Iwasaki, M. Tanaka, N. Irie, A. Fujimaki, N. Yoshikawa, H. Terai, S. Yorozu, “Quantative Evaluation of Delay Time in the Single-flux-Quantum Circuits,” on 19th International Symposium on Superconductivity (ISS2006), Nagoya, October 2006, pp. 161
(14) Y. Yamanashi, N. Yoshikawa, “Study on a DC-powered On-chip Voltage Generator Using SFQ Circuits,” on 19th International Symposium on Superconductivity (ISS2006), Nagoya, October 2006, pp. 329.
(15) T. Hikida, T. Nishigai, N. Yoshikawa, “Consideration of Low-power SFQ Circuits Using Josephson-junction-load Biasing,” on 19th International Symposium on Superconductivity (ISS2006), Nagoya, October 2006, pp. 331.
(16) K. Churei, H. Kojima, N. Yoshikawa, Y. Hashimoto, Y. Kameda, S. Yorozu, “Bit-error-rate Simulations of Josephson Latching Drivers Using the 10kA/cm2Nb Process,” on 19th International Symposium on Superconductivity (ISS2006), Nagoya, October 2006, pp. 332.
(17) K. Nakamiya, T. Nishigai, N. Yoshikawa, A. Fujimaki, H. Terai, S. Yorozu, “Improvement of Time Resolution of the Double-Oscillator Time-to-digital Converter Using SFQ Circuits.” on 19th International Symposium on Superconductivity (ISS2006), Nagoya, October 2006, pp. 333.
(18) N. Kawai, N. Yoshikawa, “Reduction of a Bit-error-rate of Josephson Latching Drivers Using Series Inductors,” on 19th International Symposium on Superconductivity (ISS2006), Nagoya, October 2006, pp. 334.
Other Years