International Conf. of 2019

(1) "N. Yoshikawa, Y. Yamanashi, N. Takeuchi, C. Ayala, A. Fujimaki, M. Tanaka, M. Hidaka “Study on Adiabatic Single-Flux-Quantum Circuits Approaching the Thermodynamic Energy Limit,” 12th Superconducting SFQ VLSI Workshop (SSV 2019), Kobe, Japan, January 16-17, 2019, O-2."

(2) "Y. Hironaka, Y. Yamanashi, N. Yoshikawa, “Design of a One-Instruction-Set SFQ Microprocessor for High-Speed Demonstration of SFQ/CMOS Hybrid System,” 12th Superconducting SFQ VLSI Workshop (SSV 2019), Kobe, Japan, January 16-17, 2019, P-3."

(3) "F. Ke, Y. Yamanashi, T. Ortlepp, N. Yoshikawa, “56-GHz demonstration of a 13-bit 50-sample/period SFQ-based sine code generator using 10 kA/cm2 Nb process,” 12th Superconducting SFQ VLSI Workshop (SSV 2019), Kobe, Japan, January 16-17, 2019, P-4."

(4) "O. Chen, F. Ke, R. Saito, R. Cai, Y. Wang, N. Yoshikawa, “AQFP-SYNTH: A Performance Evaluation Framework for Adiabatic Quantum-Flux-Parametron Based Circuits and Systems,” 12th Superconducting SFQ VLSI Workshop (SSV 2019), Kobe, Japan, January 16-17, 2019, P-8."

(5) "T. Tamura, C. Ayala, N. Takeuchi, Y. Yamanashi, N. Yoshikawa, “Design and Measurement of a 5-to-31 Decoder Using Offset Adiabatic Quantum Flux Parametron Gates,” 12th Superconducting SFQ VLSI Workshop (SSV 2019), Kobe, Japan, January 16-17, 2019, P-9."

(6) "T. Tanaka, C. Ayala, Q. Xu, R. Saito, N. Yoshikawa, “Measurement Result of Adiabatic Quantum Flux Parametron 4-bit Shifter-Rotator Circuit Designed by Automatic Placement,” 12th Superconducting SFQ VLSI Workshop (SSV 2019), Kobe, Japan, January 16-17, 2019, P-10."

(7) "T. Yamae, N. Takeuchi, Y. Yamanashi, N. Yoshikawa, “Design and Measurement of a Reversible 4-to-16 Decoder Using Adiabatic Quantum-Flux-Parametron Logic,” 12th Superconducting SFQ VLSI Workshop (SSV 2019), Kobe, Japan, January 16-17, 2019, P-11."

(8) "Y. Yamazaki, Y. Yamanashi, N. Yoshikawa, “Design and Simulation of a Five-Input Majority Gate Using Adiabatic Quantum Flux Parametron Logic,” 12th Superconducting SFQ VLSI Workshop (SSV 2019), Kobe, Japan, January 16-17, 2019, P-12."

(9) "S. Michibayashi, N. Takeuchi, Y. Yamanashi, N. Yoshikawa,“A Proposal of a Microwave Chopper Using Single-Flux-Quantum Circuits with Controllable Amplitude of Microwave,” 12th Superconducting SFQ VLSI Workshop (SSV 2019), Kobe, Japan, January 16-17, 2019, P-15."

(10) "Y. He, N. Takeuchi, N. Yoshikawa, “Compact High Selectivity In-Line Topology Filter Based on LTS Technology, ” 12th Superconducting SFQ VLSI Workshop (SSV 2019), Kobe, Japan, Jan. 16-17, 2019, P-20."

(11) "Y. Tsuna, Y. Yamanashi, N. Yoshikawa, “Simulation of Superconductor Circuit Operation Considering 1/f Noises,” 12th Superconducting SFQ VLSI Workshop (SSV 2019), Kobe, Japan, January 16-17, 2019, P-21."

(12) "D. Yamaguchi, Y. Yamanashi, N. Yoshikawa, “Investigation of Superconducting Neural Network Realizing Arbitrary Logic Function,” 12th Superconducting SFQ VLSI Workshop (SSV 2019), Kobe, Japan, January 16-17, 2019, P-22."

(13) "K. Akizuki, Y. Yamanashi, N. Yoshikawa, “Measurement of an SFQ 1-Symbol Matching Circuit Corresponding to Regular Expressions,” 12th Superconducting SFQ VLSI Workshop (SSV 2019), Kobe, Japan, January 16-17, 2019, P-24."

(14) "C. L. Ayala, N. Yoshikawa, “New Directions for Adiabatic Quantum-Flux-Parametron Logic Computing,” 12th Superconducting SFQ VLSI Workshop (SSV 2019), Kobe, Japan, January 16-17, 2019, O-4."

(15) "N. Takeuchi, T. Yamashita, S. Miyajima, S. Miki, N. Yoshikawa, H. Terai, “Adiabatic Quantum-Flux-Parametron Logic as a Readout Interface for Superconducting Nanowire Single Photon Detectors,” 12th Superconducting SFQ VLSI Workshop (SSV 2019), Kobe, Japan, January 16-17, 2019, O-9."

(16) "N. Yoshikawa, “Thin-film basics and device manufacture,” South African Superconducting Quantum electronic circuit design tools and Analysis workshop (SASQIA 2019), Hermanus, Cape Town, March 3-8, 2019, D1L3."

(17) "N. Yoshikawa, “AQFP circuit design and simulation,” South African Superconducting Quantum electronic circuit design tools and Analysis workshop (SASQIA 2019), Hermanus, Cape Town, March 3-8, 2019, D2L5."

(18) "N. Yoshikawa, “Passive transmission lines matching and layout,” South African Superconducting Quantum electronic circuit design tools and Analysis workshop (SASQIA 2019), Cape Town, South Africa, March 3-8, 2019, D5L3."

(19) "R. Saito, C. L. Ayala, O. Chen, T. Tanaka, N. Yoshikawa, “Automatic Top-Down Methodology with Retiming Optimization for Adiabatic Quantum-Flux-Parametron Logic,” South African Superconducting Quantum electronic circuit design tools and Analysis workshop (SASQIA 2019), Cape Town, South Africa, March 3-8, 2019."

(20) "T. Tanaka, C. L. Ayala, O. Chen, R. Saito, N. Yoshikawa, “Measurement Result of Adiabatic Quantum-Flux-Parametron 4-bit Shifter-Rotator Circuit Designed by Automatic Placement,” South African Superconducting Quantum electronic circuit design tools and Analysis workshop (SASQIA 2019), Cape Town, South Africa, March 3-8, 2019."

(21) "K. Fei, Y. Yamanashi, T. Ortlepp, N. Yoshikawa, “Demonstration and evaluation of a 13-bit 50-sample/period SFQ-based sine code generator,” South African Superconducting Quantum electronic circuit design tools and Analysis workshop (SASQIA 2019), Cape Town, South Africa, March 3-8, 2019."

(22) "N. Yoshikawa, “(Tutorial) Library design and design tools for adiabatic quantum-flux-parametron logic circuits (ac-biased SFQ logic),” Design, Automation and Test in Europe (DATE 2019), Florence, Italy, March 25-29, 2019."

(23) "R. Cai, O. Chen, A. Ren, N. Liu, C Ding, N. Yoshikawa, Y. Wang, “A Majority Logic Synthesis Framework for Adiabatic Quantum-Flux-Parametron Superconducting Circuits,” Great Lakes Symposium on VLSI (GLSVLSI 2019), pp. 189-194, Tysons Corner, VA, USA, May 09-11, 2019."

(24) "N. Yoshikawa, “(Keynote) Asynchronous Superconducting Digital Circuits,” 25th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2019), Hirosaki, Japan, May 12-15, 2019."

(25) "R. Cai, A. Ren, O. Chen, N. Liu, C. Ding, X. Qian, J.Han, W. Luo, N. Yoshikawa, Y. Wang, “A stochastic-computing based deep learning framework using adiabatic quantum-flux-parametron superconducting technology,” Proceedings of the 46th International Symposium on Computer Architecture (ISCA2019), Phoenix, Arizona, June 22-26, 2019, pp. 567-578"

(26) "N. Yoshikawa, “(Tutorial) Quantum Flux Parametron Logic,” ISEC Summer School, Riverside, California, USA, July 26, 2019."

(27) "N. Yoshikawa, “(Keynote) Superconducting computing: present status and perspectives,” The 17th International Superconductive Electronics Conference (ISEC 2019), Riverside, California, USA, July 28-August 1, 2019."

(28) "T. Tamura, N. Takeuchi, C. L. Ayala, Y. Yamanshi, N. Yoshikawa, “Design and Implementation of Compact Register Files Using Adiabatic Quantum Flux Parametron Logic,” The 17th International Superconductive Electronics Conference (ISEC 2019), Riverside, California, USA, July 28-August 1, 2019."

(29) "Y. Tsuna, Y. Yamanshi, N. Yoshikawa, “Investigation of the effects of 1/f noise on superconducting circuits,” The 17th International Superconductive Electronics Conference (ISEC 2019), Riverside, California, USA, July 28-August 1, 2019."

(30) "C. L. Ayala, O. Chen, N. Yoshikawa, “AQFPTX: Adiabatic Quantum-Flux-Parametron Timing eXtraction Tool,” The 17th International Superconductive Electronics Conference (ISEC 2019), Riverside, California, USA, July 28-August 1, 2019."

(31) "N. Takeuchi, F. China, S. Miki, S. Miyajima, M. Yaburo, N. Yoshikawa, H. Terai, “Scalable readout circuits for superconducting nanowire single-photon detectors using adiabatic quantum-flux-parametron and rapid single-flux-quantum logic families,” The 17th International Superconductive Electronics Conference (ISEC 2019), Riverside, California, USA, July 28-August 1, 2019."

(32) "Y. He, N. Takeuchi, N. Yoshikawa, “High Selectivity In-Line Topology LTS Filter Based on Direct Synthesis Method,” The 17th International Superconductive Electronics Conference (ISEC 2019), Riverside, California, USA, July 28-August 1, 2019."

(33) "K. Akizuki, Y. Yamanshi, N. Yoshikawa, “Measurement of an SFQ complex event detector for complex event processing,” The 17th International Superconductive Electronics Conference (ISEC 2019), Riverside, California, USA, July 28-August 1, 2019."

(34) "N. Takeuchi, M. Nozoe, Y. He, N. Yoshikawa, “Low-latency adiabatic quantum-flux-parametron using delay-line clocking,” The 17th International Superconductive Electronics Conference (ISEC 2019), Riverside, California, USA, July 28-August 1, 2019."

(35) "T. Tanaka, C. L. Ayala, O. Chen, R. Saito, N. Yoshikawa, “Quality of Results of Adiabatic Quantum-Flux-Parametron Integrated Circuits Placed by the Genetic Algorithm,” The 17th International Superconductive Electronics Conference (ISEC 2019), Riverside, California, USA, July 28-August 1, 2019."

(36) "T. Yamae, N. Takeuchi, C. L. Ayala, H. Suzuki, N. Yoshikawa, “Demonstration and energy evaluation of an 8-bit carry look-ahead adder using adiabatic quantum-flux-parametron logic,” The 17th International Superconductive Electronics Conference (ISEC 2019), Riverside, California, USA, July 28-August 1, 2019."

(37) "Y. Hironaka, T. Ortlepp, Y. Yamanashi, N. Yoshikawa, “Demonstration of a single-flux-quantum microprocessor operating with a Josephson-CMOS hybrid memory,” The 17th International Superconductive Electronics Conference (ISEC 2019), Riverside, California, USA, July 28-August 1, 2019."

(38) "C. L. Ayala, T. Tanaka, M. Nozoe, N. Takeuchi, N. Yoshikawa, “Component Demonstration of a RISC-based AQFP MANA Processor,” The 17th International Superconductive Electronics Conference (ISEC 2019), Riverside, California, USA, July 28- August 1, 2019."

(39) "H. Terai, M. Yaburo, S. Miyajima, S. Miki, F. China, N. Takeuchi, N. Yoshikawa, H. Terai, “Single-photon camera with a superconducting nanowire single-photon detector array and cryogenic digital signal processing,” The 17th International Superconductive Electronics Conference (ISEC 2019), Riverside, California, USA, July 28-August 1, 2019."

(40) "Y. Yamanashi, A. Sanada, N. Yoshikawa, “Measurement of Single-Flux-Quantum Floating-Point Divider Based on Goldschmidt's Algorithm,” The 17th International Superconductive Electronics Conference (ISEC 2019), Riverside, California, USA, July 28- August 1, 2019."

(41) "T. Yamae, N. Takeuchi, Y. Yamanashi, N. Yoshikawa, “A flip-flop and a decoder for reversible quantum-flux-parametron register files,” The 17th International Superconductive Electronics Conference (ISEC 2019), Riverside, California, USA, July 28-August 1, 2019."

(42) "O. Chen, T. Tanaka, R. Cai, Y. Wang, N. Yoshikawa, “Design and implementation of a bitonic sorter based DCNN using adiabatic superconducting logic,” The 17th International Superconductive Electronics Conference (ISEC 2019), Riverside, California, USA, July 28-August 1, 2019."

(43) "C. Fourie, L. Schindler, C. L. Ayala, T. Tanaka, R. Saito, N. Yoshikawa, “Standard Cell Layout Synthesis for Row-Based Placement and Routing of RSFQ and AQFP Logic Families,” The 17th International Superconductive Electronics Conference (ISEC 2019), Riverside, California, USA, July 28-August 1, 2019."

(44) "N. Yoshikawa, “(Invited) Recent progress of adiabatic-quantum-flux-parametron circuit technologies,” The 14th European Conference on Applied Superconductivity (EUCAS 2019), Glasgow, Scotland, September 1–5, 2019."

(45) "F. Ke, Y. Yamanashi, T. Ortlepp, N. Yoshikawa, “High-Speed Operation of a 13-bit 50-sample/period SFQ-based Sine Code Generator,” The 14th European Conference on Applied Superconductivity (EUCAS 2019), Glasgow, Scotland, September 1–5, 2019."

(46) "Y. He, N. Takeuchi, N. Yoshikawa, “Low-latency AQFP logic by using serial-type power dividers,” The 14th European Conference on Applied Superconductivity (EUCAS 2019), Glasgow, Scotland, September 1–5, 2019."

(47) "Y. He, C. L. Ayala, N. Takeuchi, T. Yamae, Y. Hironaka, N. Yoshikawa, “A Compact AQFP Logic Cell Design Using an 8-Metal Layer Superconductor Process,” The 14th European Conference on Applied Superconductivity (EUCAS 2019), Glasgow, Scotland, September 1–5, 2019."

(48) "O. Chen, W. Luo, R. Cai, N. Takeuchi, Y. Wang, N. Yoshikawa, “A novel stochastic number generator using adiabatic superconducting technology,” The 14th European Conference on Applied Superconductivity (EUCAS 2019), Glasgow, Scotland, September 1–5, 2019."

(49) "N. Yoshikawa, N. Takeuchi, C. Ayala, O. Chen, Y. He, Y. Yamanashi, “Extremely Energy-Efficient Circuit Technology based on Adiabatic Quantum Flux Parametron,” The 10th East Asia Symposium on Superconductor Electronics (EASSE-2019), Beijing, China, October 8-11, 2019."

(50) "H. Terai, M. Yabuno, S. Miyajima, S. Miki, F. China, N. Takeuchi, N. Yoshikawa, “Recent progress in research and development of superconducting nanowire single-photon detectors,” The 10th East Asia Symposium on Superconductor Electronics (EASSE-2019), Beijing, China, October 8-11, 2019."

(51) "N. Yoshikawa, “Energy-Efficient Superconducting Digital Circuit Technology for High Performance Computation,” Joint KU-VUW Workshop 2019, Portage, New Zealand, November 10-12, 2019."

(52) "N. Yoshikawa, “High-Speed and High-Sensitivity Sensor Readout and Signal Processing using Superconducting Circuits,” Workshop on the Future of Silicon Detector Technologies (FuTuRe), Erfurt, Germany, December 2-3, 2019."

(53) "F. Ke, Y. Yamanashi, N. Yoshikawa, “Design and High-speed Test of an SFQ-based Single-chip FFT Processor,” The 32nd International Symposium on Superconductivity (ISS2019), Kyoto, Japan, December 3-5, 2019, ED4-6."

(54) "Z. Li, Y. Yamanashi, N. Yoshikawa, “Single-Flux-Quantum Parallel Multiplier Using Accumulator Unit,” The 32nd International Symposium on Superconductivity (ISS2019), Kyoto, Japan, December 3-5, 2019, EDP2-2."

(55) "T. Tanaka, C. L. Ayala, N. Yoshikawa, “Investigation of influence by flux trapping for interconnection of adiabatic quantum-flux-parametron circuits,” The 32nd International Symposium on Superconductivity (ISS2019), Kyoto, Japan, December 3-5, 2019, EDP2-3."

(56) "Y. Tsuna, Y. Yamanashi, N. Yoshikawa, “Numerical and Experimental Analysis of Influences of 1/f noises on Superconducting Integrated Circuits,” The 32nd International Symposium on Superconductivity (ISS2019), Kyoto, Japan, December 3-5, 2019, EDP2-4."

(57) "R. Saito, C. L. Ayala, O. Chen, T. Tanaka, N. Yoshikawa, “Development of Majority-Logic-Based Top-Down Environment for Adiabatic Quantum-Flux-Parametron Circuits,” The 32nd International Symposium on Superconductivity (ISS2019), Kyoto, Japan, December 3-5, 2019, EDP2-5."

(58) "L. Shirakawa, Y. Yamanashi, N. Yoshikawa, “Design and evaluation of multi-bit-input single-flux-quantum autocorrelator system for astronomical data analysis,” The 32nd International Symposium on Superconductivity (ISS2019), Kyoto, Japan, December 3-5, 2019, EDP2-6."

(59) "C. L. Ayala, N. Takeuchi, N. Yoshikawa, “Adiabatic Quantum-Flux-Parametron Design-For-Testability Components for Large-Scale Digital Circuits,” The 32nd International Symposium on Superconductivity (ISS2019), Kyoto, Japan, December 3-5, 2019, EDP2-7."

(60) "T. Yamae, N. Takeuchi, N. Yoshikawa, “Investigation on the Method to Evaluate the Energy Dissipation of General Adiabatic Quantum-Flux-Parametron Logic Gates,” The 32nd International Symposium on Superconductivity (ISS2019), Kyoto, Japan, December 3-5, 2019, EDP2-8."

Other Years