International Conf. of 2014

(1) N. Yoshikawa, “(Invited lecture) Adiabatic Superconducting Circuits and Reversible Computing,” Superconducting SFQ VLSI Workshop for Young Scientists (SSV 2014-YS), Nagoya, Japan, March 5-7, 2014, L-4.

(2) Y. Komura, M. Tanaka, A. Fujimaki, N. Yoshikawa, S. Nagasawa, “Study on Latching Driver with Enlarged Operating Margin for Josephson RAM,” Superconducting SFQ VLSI Workshop for Young Scientists (SSV 2014-YS), Nagoya, Japan, March 5-7, 2014, O-3.

(3) K. Sano, Y. Yamanashi, N. Yoshikawa, N. Zen, M. Ohkubo, “Evaluation of a Single-Flux-Quantum Time-to-Digital Converter for Time-of-Flight Mass Spectrometry in Cryo-cooler,” Superconducting SFQ VLSI Workshop for Young Scientists (SSV 2014-YS), Nagoya, Japan, March 5-7, 2014, O-10.

(4) R. Kihara, Y. Yamanashi, N. Yoshikawa, “Evaluation of Stochastic Resonance Phenomenon in Rf-SQUID,” Superconducting SFQ VLSI Workshop for Young Scientists (SSV 2014-YS), Nagoya, Japan, March 5-7, 2014, O-11.

(5) X. Peng, Y. Yamanashi, N. Yoshikawa, “High-Speed Demonstration of Single-Precision Bit-Serial Floating-Point Multipliers Using Single-Flux-Quantum Circuits,” Superconducting SFQ VLSI Workshop for Young Scientists (SSV 2014-YS), Nagoya, Japan, March 5-7, 2014, P-2.

(6) Q. Xu, Y. Yamanashi, N. Yoshikawa, T. Ortlepp, “Demonstration of an SFQ-Based Bit-Serial Computing for Integer Iteration Algorithms,” Superconducting SFQ VLSI Workshop for Young Scientists (SSV 2014-YS), Nagoya, Japan, March 5-7, 2014, P-4.

(7) Y. Sakashita, T. Kato, Y. Yamanashi, N. Yoshikawa, “Design and High-Speed Operation of an Integer-Type SFQ Butterfly Circuit Using the Nb 10 kA/cm2 Josephson Process,” Superconducting SFQ VLSI Workshop for Young Scientists (SSV 2014-YS), Nagoya, Japan, March 5-7, 2014, P-6.

(8) Z. Gao, A. Takahashi, R. Numaguchi, S. Miyanishi, Y. Yamanashi, H. Suzuki, N. Yoshikawa, “Simulation and Measurement of the Vortex Transition Memory Cells for Single-Flux-Quantum Random Access Memories,” Superconducting SFQ VLSI Workshop for Young Scientists (SSV 2014-YS), Nagoya, Japan, March 5-7, 2014, P-7.

(9) R. Numaguchi, A. Takahashi, Y. Yamanashi, N. Yoshikawa, “Development of Low-Power 1k-bit Shift-Register Memories Using LR-Biasing SFQ Circuits,” Superconducting SFQ VLSI Workshop for Young Scientists (SSV 2014-YS), Nagoya, Japan, March 5-7, 2014, P-10.

(10) T. Nishimura, Y. Sasaki, X. Peng, Y. Yamanashi, N. Yoshikawa, “Development of High-Sensitive CMOS Amplifiers for Josephson-CMOS Interfaces,” Superconducting SFQ VLSI Workshop for Young Scientists (SSV 2014-YS), Nagoya, Japan, March 5-7, 2014, P-11.

(11) R. Tsusumi, Y. Yamanashi, N. Yoshikawa, “Design and Measurement of Zero-Static-Power SFQ Circuit Using Dc Magnetic Flux Biasing,” Superconducting SFQ VLSI Workshop for Young Scientists (SSV 2014-YS), Nagoya, Japan, March 5-7, 2014, P-13.

(12) S. Nishimoto, Y. Yamanashi, N. Yoshikawa, “Design of Reconfigurable Adder/Subtractor Using Dynamically Reconfigurable Single Flux Quantum DFF/NOT Gate,” Superconducting SFQ VLSI Workshop for Young Scientists (SSV 2014-YS), Nagoya, Japan, March 5-7, 2014, P-15.

(13) K. Sato, Y. Yamanashi, N. Yoshikawa, “High Speed Test of a Multiple Input Merger Using a Magnetically Coupled Dc-SQUID Stack,” Superconducting SFQ VLSI Workshop for Young Scientists (SSV 2014-YS), Nagoya, Japan, March 5-7, 2014, P-16.

(14) Y. Muramatsu, K. Sano, Y. Yamanashi, N. Yoshikawa, “Design of m/z-Sensitive Time-of-Flight Mass Spectrometry Systems Using Single-Flux-Quantum Multi-Threshold Current Discriminators,” Superconducting SFQ VLSI Workshop for Young Scientists (SSV 2014-YS), Nagoya, Japan, March 5-7, 2014, P-19.

(15) F. China, Y. Yamanashi, N. Yoshikawa, “Improvement of Dynamic Range of High-Sensitive Superconductive Digital Magnetometer,” Superconducting SFQ VLSI Workshop for Young Scientists (SSV 2014-YS), Nagoya, Japan, March 5-7, 2014, P-21.

(16) Y. Sakashita, Y. Yamanashi, N. Yoshikawa, “75-GHz operation of an SFQ butterfly processing unit for FFT processors using the Nb 10 kA/cm2 Josephson process,” 2014 Appl. Superconductivity Conference (ASC 2014), Charlotte, North Carolina, USA, August, 2014, 1EOr1A- 04.

(17) X. Peng, Y. Sasaki, Y. Yamanashi, N. Yoshikawa, “Improvement of 64-kb Josephson-CMOS hybrid memories toward their complete operation,” 2014 Appl. Superconductivity Conference (ASC 2014), Charlotte, North Carolina, USA, August, 2014, 1EOr3A-05.

(18) S. Nishimoto, Y. Yamanashi, N. Yoshikawa, “Design Method of Single Flux Quantum Logic Circuits Using Dynamically Reconfigurable Logic Gates,” 2014 Appl. Superconductivity Conference (ASC 2014), Charlotte, North Carolina, USA, August, 2014, 2EPo2D-05.

(19) C. J. Fourie, X. Peng, R. Numaguchi, N. Yoshikawa, “Inductance and coupling of stacked vias in a multilayer superconductive IC process,” 2014 Appl. Superconductivity Conference (ASC 2014), Charlotte, North Carolina, USA, August, 2014, 2EPo2D-07.

(20) X. Peng, T. Kato, Y. Yamanashi, N. Yoshikawa, A. Fujimaki, K. Takagi, N. Takagi, S. Nagasawa, “(Invited) High-speed demonstration of bit-serial floating-point adders and multipliers using single-flux-quantum (SFQ) circuits,” 2014 Appl. Superconductivity Conference (ASC 2014), Charlotte, North Carolina, USA, August, 2014, 2EOr2C-0

(21) N. Yoshikawa, K. Inoue, N. Takeuchi, Y. Yamanashi, “Design and demonstration of an 8-bit carry look-ahead adder using ultra-low-power adiabatic quantum-flux-parametron logic,” 2014 Appl. Superconductivity Conference (ASC 2014), Charlotte, North Carolina, USA, August, 2014, 2EOr2C-05.

(22) Y. Yamanashi, R. Tsutumi, N. Yoshikawa, “Zero Static Power Single Flux Quantum Circuit Using Magnetic Flux Biasing,” 2014 Appl. Superconductivity Conference (ASC 2014), Charlotte, North Carolina, USA, August, 2014, 2EOr2C-06.

(23) T. Ortlepp, M. Fiedler, N. Takeuchi, N. Yoshikawa, “Ballistic interconnects for energy efficient superconductor electronics,” 2014 Appl. Superconductivity Conference (ASC 2014), Charlotte, North Carolina, USA, August, 2014, 3EPo2B-06.

(24) N. Takeuchi, Y. Yamanashi, N. Yoshikawa, “Experimental demonstration of logical and physical reversibility of reversible quantum-flux-parametron gates,” 2014 Appl. Superconductivity Conference (ASC 2014), Charlotte, North Carolina, USA, August, 2014, 3EPo2B-07.

(25) N. Zen, M. Ohkubo, S. Shiki, M. Ukibe, M. Koike, K. Sano, N. Yoshikawa, “(Invited) Dynamics of parallel superconducting strip ion detectors,” 2014 Appl. Superconductivity Conference (ASC 2014), Charlotte, North Carolina, USA, August, 2014, 3EPo2D-01.

(26) K. Sano, Y. Yamanashi, N. Yoshikawa, N. Zen, M. Ohkubo, “Demonstration of Single-Flux-Quantum Time-to-Digital Converters for Time-of-Flight Mass Spectrometry,” 2014 Appl. Superconductivity Conference (ASC 2014), Charlotte, North Carolina, USA, August, 2014, 4EOr2A-01.

(27) Q. Xu, Y. Yamanashi, T. Ortlepp, N. Yoshikawa, “Demonstration of a bit-serial SFQ-based computing for integer iteration algorithms,” 2014 Appl. Superconductivity Conference (ASC 2014), Charlotte, North Carolina, USA, August, 2014, 4EOr3A-02.

(28) K. Sato, Y. Yamanashi, N. Yoshikawa, “High Speed Operation of Single Flux Quantum Multiple Input Merger Using a Magnetically Coupled SQUID Stack,” 2014 Appl. Superconductivity Conference (ASC 2014), Charlotte, North Carolina, USA, August, 2014, 4EOr3A-04.

(29) N. Takeuchi, T. Ortlepp, Y. Yamanashi, N. Yoshikawa, “Experimental demonstration of quantum-flux-latch-based circuits,” 2014 Appl. Superconductivity Conference (ASC 2014), Charlotte, North Carolina, USA, August, 2014, 4EOr3A-05.

(30) N. Yoshikawa, “Superconductive Electronics Research at Yokohama National University,” 1st Stellenbosch Workshop on Superconductive Circuit Modelling and Layout Extraction, Stellenbosch, South Africa, September 1-2, 2014.

(31) N. Yoshikawa, “Design challenges for realizing large-scale single-flux-quantum circuits: how to cope with large bias currents,” 1st Stellenbosch Workshop on Superconductive Circuit Modelling and Layout Extraction, Stellenbosch, South Africa, September 1-2, 2014.

(32) Y. Yamanashi, R. Tsutsumi, N.Yoshikawa, “Design and Test of dc-Biased Zero Static Power Single Flux Quantum Circuit,” 27th International Symposium on Superconductivity (ISS2014), Tokyo, Japan, November 25-27, 2014, FD-12.

(33) K. Sano, Y. Muramatsu, T. Shimoda, Y. Yamanashi, N. Yoshikawa, N. Zen, M. Ohkubo,“Time-of-Flight Mass Spectrometry Using Signe-Flux-Quantum Time-to-Digital Converter and a Superconducting Strip Ion Detector in a Cryo-Cooler,” 27th International Symposium on Superconductivity (ISS2014), Tokyo, Japan, November 25-27, 2014, FD-18.

(34) R. Kihara, Y. Yamanashi, N. Yoshikawa, “Power Reduction of Rf-SQUID Memory Cell Using Stochastic Resonance,” 27th International Symposium on Superconductivity (ISS2014), Tokyo, Japan, November 25-27, 2014, FDP-24.

(35) F. China, Y. Yamanashi, N. Yoshikawa, “Performance Estimation and Design of High-Sensitive Superconductive Digital Magnetometer,” 27th International Symposium on Superconductivity (ISS2014), Tokyo, Japan, November 25-27, 2014, FDP-25.

(36) Q. Xu, X. Peng, Y. Yamanashi, T. Ortlepp, N. Yoshikawa, “High-speed Demonstration of an SFQ-based Computing System for Solving 3n+1 Problem,” 27th International Symposium on Superconductivity (ISS2014), Tokyo, Japan, November 25-27, 2014, FDP-28.

(37) N. Takeuchi, Y. Yamanashi, N. Yoshikawa, “Adiabatic Quantum-flux-parametron Cell Library with Minimalist Design,” 27th International Symposium on Superconductivity (ISS2014), Tokyo, Japan, November 25-27, 2014,FDP-29.

(38) H. Sugata, Y. Yamanashi, N. Yoshikawa, “ Investigation of Post-Processing Circuit to Improve Superconducting Physical Random Number Generator,” 7th Superconducting SFQ VLSI Workshop (SSV 2014), Kobe, Japan, December 1-2, 2014, P-1.

(39) Q. Xu, T. Ortlepp, Y. Yamanashi, N .Yoshikawa, “High-speed Demonstration of Bit-serial SFQ-based Computing for Integer Iteration Algorithms,” 7th Superconducting SFQ VLSI Workshop (SSV 2014), Kobe, Japan, December 1-2, 2014, P-4.

(40) Y. Komura, M. Tanaka, A. Fujimaki , N. Yoshikawa, S. Nagasawa, “Development of Vortex Transition Memory Cells for a Josephson RAM,” 7th Superconducting SFQ VLSI Workshop (SSV 2014), Kobe, Japan, December 1-2, 2014, p-6.

(41) K. Sano, Y. Muramatsu, T. Shimoda, Y. Yamanashi, N. Yoshikawa , N. Zen, M. Ohkubo,“Demonstration of a Single-Flux-Quantum Time-to-Digital Converter with 3×24-Bit First-In First-Out Buffers for Time-of-Flight Mass Spectrometry of Biomolecules,” 7th Superconducting SFQ VLSI Workshop (SSV 2014), Kobe, Japan, December 1-2, 2014, P-9

(42) Y. Muramatsu, K. Sano, T. Shimoda, Y. Yamanashi, N. Yoshikawa, “Measurement of a Gray Zone Width of SFQ Multi-Threshold Current Discriminators for m/z-Sensitive Time-of-Flight Mass Spectrometry,” 7th Superconducting SFQ VLSI Workshop (SSV 2014), Kobe, Japan, December 1-2, 2014, P-10.

(43) Shimoda, Y. Muramatsu, K. Sano, Y. Yamanashi, N. Yoshikawa, “Comparison of Jitter in Three Types of SFQ Ring Oscillators,” 7th Superconducting SFQ VLSI Workshop (SSV 2014), Kobe, Japan, December 1-2, 2014, P-11.

(44) R. Numaguchi, T. Takahashi, N. Yoshikawa, Y. Yamanashi, A. Fujimaki, M. Tanaka, N. Takagi, K. Takagi, “Design of Shift-Register Memories for SFQ Microprocessors CORE e,” 7th Superconducting SFQ VLSI Workshop (SSV 2014), Kobe, Japan, December 1-2, 2014, P-12.

(45) T. Takahashi, R. Numaguchi, Y. Yamanashi, N. Yoshikawa, “Design of a High-Throughput Decoder for SFQ Shift-Register Memories,” 7th Superconducting SFQ VLSI Workshop (SSV 2014), Kobe, Japan, December 1-2, 2014, P-13.

(46) T. Narama, N. Takeuchi, Y. Yamanashi, N. Yoshikawa, “Demonstration of a 10,000-gate AQFP Circuit with 5 mA Bias Current,” 7th Superconducting SFQ VLSI Workshop (SSV 2014), Kobe, Japan, December 1-2, 2014, P-20.

(47) Y. Yamanashi, K. Masubuchi, N. Yoshikawa, “Statistical Analysis of the Relationship between Timing Margin and the Error Rate of Single-Flux-Quantum Logic Circuits,” 7th Superconducting SFQ VLSI Workshop (SSV 2014), Kobe, Japan, December 1-2, 2014, O-4.

(48) Y. Sakashita, Y. Yamanashi, N. Yoshikawa, “Investigation on Component Circuits for the SFQ FFT Processor using the 10 kA/cm2 Nb Process,” 7th Superconducting SFQ VLSI Workshop (SSV 2014), Kobe, Japan, December 1-2, 2014, O-7.

(49) N. Takeuchi, Y. Yamanashi, N. Yoshikawa, “Recent Progress Towards a Reversible Computer using Adiabatic Superconductor Logic,” 7th Superconducting SFQ VLSI Workshop (SSV 2014), Kobe, Japan, December 1-2, 2014, O-8.

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