International Conf. of 2007
(1) K. Nakamiya, N. Yoshikawa, A. Fujimaki, Y. Hashimoto, H. Terai, “Demonstration of picosecond delay time measurements by single-flux-quantum double-oscillator time-to-digital converters,” Extended Abstract of 11th International Superconductivity Conference, 10-14 June 2007, Washington DC, USA, O-A03.
(2) N. Kawai, Y. Takahashi, K. Gotoh, N. Yoshikawa, T. Van Duzer, “Characterization of 90 nm Cryo-CMOS Devices and Circuits for Hybrid Josephson-CMOS Memories,” Extended Abstract of 11th International Superconductivity Conference, 10-14 June 2007, Washington DC, USA, P-B01.
(3) S. Iwasaki, M. Tanaka, Y. Yamanashi, H. Park, H. Akaike, A. Fujimaki, N. Yoshikawa, N. Takagi, K. Murakami, H. Honda, K. Inoue, “Design of a reconfigurable data-path prototype in the single-flux-quantum circuit,” Extended Abstract of 11th International Superconductivity Conference, 10-14 June 2007, Washington DC, USA, P-B02.
(4) Y. Yamanashi, H. Park, K. Taketomi, N. Yoshikawa, A. Fujimaki, N. Takagi, “Design and Implementation of Single-Flux-Quantum Floating-Point Adders,” Extended Abstract of 11th International Superconductivity Conference, 10-14 June 2007, Washington DC, USA, P-B03.
(5) M. Tanaka, Y. Yamanashi, N. Irie, H. -J. Park, S. Iwasaki, K. Takagi, K. Taketomi, A. Fujimaki, N. Yoshikawa, H. Terai, S. Yorozu, “Design and implementation of a pipelined 8-bit-serial single-flux-quantum microprocessor with cache memories,” Extended Abstract of 11th International Superconductivity Conference, 10-14 June 2007, Washington DC, USA, P-B04.
(6) Y. Kameda, Y. Hashimoto, S. Yorozu, H. Terai, A. Fujimaki, N. Yoshikawa, M. Hidaka, S. Nagasawa, K. Hinode, T. Sato, “4x4 SFQ network switch prototype system demonstration and 10-Gbps bit-error-rate test,” Extended Abstract of 11th International Superconductivity Conference, 10-14 June 2007, Washington DC, USA, P-B06.
(7) K. Churei, N. Yoshikawa, S. Yorozu, Y. Hashimoto, “Parameter Optimization of Josephson Latching Drivers using Bit-Error-Rate Simulations,” Extended Abstract of 11th International Superconductivity Conference, 10-14 June 2007, Washington DC, USA, P-B09.
(8) N. Yoshikawa, M. Tanaka, Y. Yamanashi, N. Irie, H. Park, S. Iwasaki, K. Taketomi, A. Fujimaki, H. Terai, S. Yorozu, “(Invited) Review of the CORE1 Microprocessor Project: Recent Development and Next Plans,” Extended Abstract of 11th International Superconductivity Electronics Conference, 10-14 June 2007, Washington DC, USA, I-S01.
(9) K. Fujiwara, Q. Liu, X. Meng, T. Van Duzer, N. Yoshikawa, “Half-Nanosecond Latency Measurement on a 64-kbit Josephson-CMOS Memory,” Extended Abstract of 11th International Superconductivity Conference, 10-14 June 2007, Washington DC, USA, O-S01.
(10) N. Irie, M. Tanaka, Y. Yamanashi, H. -J. Park, N. Yoshikawa, H. Terai, S. Yorozu, A. Fujimaki, “Scalable Cache Memory for a Bit-Serial Single-Flux-Quantum Microprocessor,” Extended Abstract of 11th International Superconductivity Conference, 10-14 June 2007, Washington DC, USA, O-S02.
(11) H. Hara, Y. Nobumori, N. Yoshikawa, A. Fujimaki, Y. Hashimoto, H. Terai, “Asynchronous High-Speed Operation of RSFQ First-In First-Out Buffers,” Extended Abstract of 11th International Superconductivity Conference, 10-14 June 2007, Washington DC, USA, O-S03.
(12) H. Park, Y. Yamanashi, K. Taketomi, N. Yoshikawa, A. Fujimaki, N. Takagi, “Fast Bit-Serial Multipliers Using RSFQ Logic Circuits,” Extended Abstract of 11th International Superconductivity Conference, 10-14 June 2007, Washington DC, USA, O-S04.
(13) K. Taketomi, Y. Yamanashi, H. Park, N. Yoshikawa, A. Fujimaki, Y. Hashimoto, H. Terai, “Design and High-speed Test of a Multiplier Accumulator for Fast Fourier Transforming Using SFQ Circuits,” Abstracts on 20th International Symposium on Superconductivity (ISS2007), Tsukuba, November 2007, FD-6, pp. 136.
(14) M. Igarashi, K. Churei, N. Yoshikawa, K. Fujiwara, Y. Hashimoto, “D Flip-Flop Based Pulse Transfer Circuits for Current Recycling,” Abstracts on 20th International Symposium on Superconductivity (ISS2007), Tsukuba, November 2007, FD-7, pp. 137.
(15) H. Park, Y. Yamanashi, K. Taketomi, N. Yoshikawa, K. Fujiwara, N. Takagi, “Multifunctional Buffers Using SFQ Logic Circuits,” Abstracts on 20th International Symposium on Superconductivity (ISS2007), Tsukuba, November 2007, FDP-73, pp. 325.
(16) N. Kawai, Y. Takahashi, N. Yoshikawa, T.V. Duzer, “Access Time Measurement of 16-kb Josephson-CMOS Hybrid Memories Using RSFQ Time-to-Digital Converters,” Abstracts on 20th International Symposium on Superconductivity (ISS2007), Tsukuba, November 2007, FDP-74, pp. 325.
(17) K. Nakamiya, N. Yoshikawa, “Demonstration of Picosecond Delay Time Measurements of the High-Speed Signal from The Room Temperature by Single-Flux-Quantum Double-Oscillator Time-To-Digital Converters,” Abstracts on 20th International Symposium on Superconductivity (ISS2007), Tsukuba, November 2007, FDP-75, pp. 326.
(18) H. Hara, Y. Yamanashi, H. Park, K. Churei, K. Nakamiya, M. Igarashi, K. Taketomi, N. Yoshikawa, A. Fujimaki, Y. Hashimoto, H. Terai, “Examination of Bias-Current Shielding Structure of SFQ Logic Cells for The Large Circuit Yield,” Abstracts on 20th International Symposium on Superconductivity (ISS2007), Tsukuba, November 2007, FDP-76, pp. 326.
(19) K. Churei, N. Yoshikawa, Y. Hashimoto “Parameter Optimization and BER Measurement of Josephson Latching Drivers Using The 10 kA/cm2 Nb Process,” Abstracts on 20th International Symposium on Superconductivity (ISS2007), Tsukuba, November 2007, FDP-78, pp. 327.
(20) N. Yoshikawa, “(Invited) Superconductor Electronics based on Single-Flux-Quantum Circuit Technology,” East Asia Symposium on Superconductor Electronics (EASSE2007), 11-15 December 2007, Delhi, India.
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